• Global Semiconductor Leader - Electric Vehicles Industrial Automation|FPGA prototype - RTL Design - RISC-V - SoC - Team Leadership and Mentorship

About Our Client
Global leader in developing cutting-edge MCU and DSP systems, as well as hardware accelerators, primarily for the automotive and industrial markets.

As part of their continued growth, they are seeking a (Senior) Principal IC Digital Design Engineer to join their R&D - European Hub in Neuchâtel.

As the Principal Digital IC Design Engineer, you will play a pivotal role in shaping the company's product lines, driving innovation, and ensuring technical excellence. In this senior-level role, your leadership and technical expertise will guide project, from initial architecture through to final implementation.

Key Responsibilities:

• Lead and mentor a team of engineers,


• Architect, specify, implement, simulate, and benchmark MCU, DSP systems,


• Collaborate with product integration teams to define, integrate, and optimize these systems.


• Lead the verification process and FPGA prototyping of systems to ensure robust and reliable designs.


• Coordinate closely with the software team to guide SDK development for these systems,

Why Join our client R&D HUB in Neuchatel ?

• Operates across 20+ manufacturing sites, everyday reinforcing their presence in Europe


• Highly recognized for its leadership in automotive semiconductor solutions,


• Collaborates with some of the world's largest automotive brands and playing a key role in autonomous driving.


• Celebrates a culture of innovation, reflected in its award-winning sensor technologies and power management solutions.


• Enjoy an excellent quality of life in Switzerland, known for its landscapes, highly rated education system, and a high standard of living.

Ideal candidates for this role should possess:

• 8+ years of experience in Digital microchip design,


• Knowledge of RISC-V architecture,


• You had in the past mentoring or leadership mission towards colleagues or projects,

• Expertise in embedded CPUs and AMBA bus protocols (AHB/APB),


• Experience in RTL design,


• Usage of Verilog system,


• Knowledge of design intent methodologies, including SDC and UPF,


• Ability to write technical documentation,

• Fluent English is required; French is a plus.

Bonus Skills:

• Experience with CPU/MCU design, SystemRDL, or IP-XACT.


• Programming experience in Python and C/C++


• Familiarity with full RTL-to-GDS flow ; including logic synthesis, place-and-route, STA, and power analysis.


• Knowledge of digital verification methodologies,